1. Field of the Invention
The present invention relates to a package and a method of making the same. More particularly, the present invention relates to a three-dimensional package and a method of making the same.
2. Description of the Related Art
FIG. 1 shows a schematic view of a conventional three-dimensional package. The conventional three-dimensional package 1 includes a first substrate 11, a first chip 12, a plurality of first wires 13, a second substrate 14, a second chip 15, a plurality of second wires 16, a second molding compound 17, a spacer 18, a third chip 19, a plurality of third wires 20, a plurality of fourth wires 21, a first molding compound 22, and a plurality of solder balls 23.
The first substrate 11 has a first surface 111 and a second surface 112. The first chip 12 has a first surface 121 and a second surface 122, and the second surface 122 of the first chip 12 is adhered to the first surface 111 of the first substrate 11. The first wires 13 are used to electrically connect the first surface 121 of the first chip 12 and the first surface 111 of the first substrate 11.
A lower end of the spacer 18 is adhered to the first surface 121 of the first chip 12. The third chip 19 is also adhered to the first surface 121 of the first chip 12. The third wires 20 are used to electrically connect the third chip 19 and the first surface 111 of the first substrate 11, and the third chip 19 is thinner than the spacer 18.
The second substrate 14 has a first surface 141 and a second surface 142. The second chip 15 has a first surface 151 and a second surface 152, and the second surface 152 of the second chip 15 is adhered to the first surface 141 of the second substrate 14. The second wires 16 are used to electrically connect the first surface 151 of the second chip 15 and the first surface 141 of the second substrate 14. The second molding compound 17 encapsulates the second chip 15, the second wires 16, and the first surface 141 of the second substrate 14. The second molding compound 17 has a first surface 171.
The second substrate 14, the second chip 15, the second wires 16, and the second molding compound 17 are assembled to form a package. After the package is finished, it is turned over 180 degrees to be stacked on the spacer 18, so as to make the upper end of the spacer 18 adhere to the first surface 171 of the second molding compound 17. The fourth wires 21 are used to electrically connect the second surface 142 of the second substrate 14 and the first surface 111 of the first substrate 11.
The first molding compound 22 encapsulates the first surface 111 of the first substrate 11, the first chip 12, the first wires 13, the third wires 20, the spacer 18, the second substrate 14, the fourth wires 21, and the second molding compound 17. The solder balls 23 are placed on the second surface 112 of the first substrate 11.
The conventional three-dimensional package 1 has the following defects. The spacer 18 is a dummy die, and the material thereof is silicon. When it is bonded with the second molding compound 17 (the material thereof is glue), because the two materials are different, the adhesion is not strong. When a thermal cycle test (TCT) is performed, the bonding interface between the spacer 18 and the second molding compound 17 may easily split, thus reducing the yield of the product. In addition, the thickness of the second molding compound 17 may increase the overall thickness of the conventional three-dimensional package 1, which is a serious defect for a package that aims to be “light, thin, short, and small”.
Therefore, it is necessary to provide a three-dimensional package and a method of making the same to solve the above problems.